PHLEGM v8 - Checkpoint 51 / SPC700 logical and branch micro-codes

Evidence from ActRaiser, SNES-NTSC-2026-1010-0946-5600.coredump.phlegm:
- Checkpoint 50 corrected the uploaded driver alignment: ARAM $0400 starts 20 CD CF BD.
- Driver progressed to 734 instructions / 2441 SPC cycles.
- Next unsupported opcode $28 at PC=$09B5 (SPC700 AND A,#imm).
- APU output remains $50,$BB; the main CPU remains in startup polling loop.
- PPU INIDISP=$80 (forced blank); screen does not yet initialize.

Implemented in SPC700 .phlegm definitions only:
- AND/OR/EOR: accumulator immediate, direct-page, absolute, and X-indirect,
  plus direct-page immediate destination forms; use generic VM primitives.
- MOV A,(X), MOV (X),A, CMP A,(X), CMP X direct/absolute,
  CMP Y immediate/absolute.
- BPL/BMI/BVC/BVS/BCC/BCS and all 16 BBS/BBC direct-page bit branches.
- Branch bit-test preserves PS flags exactly; taken branches add 2 cycles.
- 256 explicit opcode classifications retained; others trap explicitly.

Validation:
- Configuration program forms and full 256-opcode coverage statically checked.
- Runtime SPC700 branch timing/flag behavior needs native testing.
- Native FreeBASIC Windows/Linux build and complete ActRaiser boot NOT tested.
- Does not implement the remaining SPC700 instruction set, S-SMP timers,
  or S-DSP output.
